Imagining miniaturized electromechanical switches in low-power computing applications


The first computers were built using electromechanical components, unlike today’s modern electronic systems. Alan Turing’s Cryptanalysis Multiplier and Konrad Zuse’s Z2 were invented and built in the first half of the 20th century and were among the first computers ever built. Electromechanical switches and relays performed logical operations in these machines. Even after computers were first built using vacuum tubes and electronic transistors, some of the earliest electromechanical (relay-based) computers remained in use because their slower speed was offset by reliability. superior. Today, most computers include logic and memory devices that operate using nanoscale transistor technology.

Fig. 1: Replica of Turing’s electromechanical computer [1]

MEMS (Micro-Electro-Mechanical-Systems) are new miniaturized devices that combine mechanical and electrical functions. These devices are used in cell phones, automobiles, and many other modern electronic technologies, and have dramatically changed our lives and the way we work and live. MEMS are also fabricated on silicon wafers. They use the same or similar manufacturing processes as transistor-based logic and memory chips for the deposition, etching, and cleaning steps. So, could we use MEMS technology to create computers based on micro-scale electromechanical logic and memory, similar to the early days of computing?

MEMS products can be directly integrated into conventional complementary metal oxide semiconductor (CMOS) logic and memory devices. However, the majority of MEMS products today are based on a dual-chip approach, where there is one manufacturing process for the MEMS device and another process for creating the associated electronic interface components (CMOS). Nevertheless, there are a large number of successful examples of MEMS devices directly produced and integrated with CMOS electronics. Texas Instrument’s DLP mirror array, Analog Devices’ surface micromachined accelerometer for automotive airbag applications, and AAC-Wispry’s RF MEMS switch are a few examples of MEMS devices that have been seamlessly integrated. monolithic on CMOS wafers with great success.

Developments of nano-electro-mechanical systems (NEMS) in logic and memory

Over the past few decades, CMOS electronics have followed Moore’s Law by shrinking the size and exponentially increasing the density of transistors. This scaling process continues as we speak, with increasingly complex structures being invented for transistor architectures. An alternative to this transistor architecture is to use existing CMOS technologies and monolithically integrate miniaturized electromechanical switches into logic and memory devices. These miniaturized switches are often referred to as nano-electro-mechanical systems (NEMS).

One of the motivations for developing NEMS-based logic or memory is power consumption. Power consumption has become a major bottleneck in advanced computing technology. This is particularly a problem for emerging low-power computing applications, such as autonomous sensor nodes used in the Internet of Things (IoT), wireless communication devices, and new mobile computers used in the edge computing. These applications all require logic circuits with greatly improved power efficiency. NEMS-based switches offer virtually zero leakage current during off-state, crisp switching characteristics, and high current performance (low current-state resistance). The potential benefits of this technology include an order of magnitude improvement in energy efficiency. Additionally, electrostatically actuated NEMS have been shown to operate efficiently at both low and high temperatures (-150 C to 300 C), allowing them to operate in harsh environmental conditions.

Fig. 2: Schematic view of a standard CMOS including a monolithically integrated electromechanical switch in BEOL [2]. Courtesy of University of California, Berkeley

NEMS can be fabricated using the metal layers of standard CMOS Back-End-Of-Line (BEOL) interconnect processes. BEOL processes can be integrated into the Front-End-Of-Line (FEOL) part of the device. The FEOL section includes the active (transistor) section of the device and comprises the building block of the main process on any computer chip. The stack manufactured by BEOL is composed of several metallic and dielectric layers to form interconnect wires and vias (interconnect structures). As electronic devices scale down, the minimum size and spacing of these patterned structures (called steps) become smaller and smaller, while the number of metal layers increases. These small feature sizes represent a potential technological challenge, but also a great opportunity for a new generation of NEMS-based devices. So far, NEMS-based logic circuits have been experimentally demonstrated using 0.35 um, 0.18 um, 65 nm, and 16 nm CMOS fabrication processes.

NEMS BEOL switch example

Figure 3 shows a BEOL NEMS relay designed at UC Berkeley using a standard 65 nm CMOS process [3]. The switch is electrostatically actuated and consists of a moving beam, two program electrodes (labeled Program 0 and Program 1), and two contact electrodes (labeled D0 and D1). The switch is shown in plan view (a) and in cross-section along section line aa’ highlighting the metal/via layers (b). The simulation results in Figure 3 display the position of the NEMS switch when programmed to state “0” (c) and state “1” (d). The color scale in (c) and (d) displays the magnitude of the displacement due to electrostatic actuation. The simulated transient response (e) displays the program voltage waveforms (upper graph) and the corresponding beam peak position over time (lower graph). Multiple NEMS switches can be placed together in arrays to perform logic or memory functions.

Fig. 3: Coventor MEMS+ model of the BEOL NEM reconfigurable switch (left), simulated transient behavior (middle) and plot of the simulated minimum (re)programming energy contour as a function of effective stiffness and adhesion force of contact (right) [3]. Courtesy of University of California, Berkeley

Design optimization and scaling

BEOL NEMS switches are able to meet design requirements for low power operating voltage, non-volatility and programmability. Different physical aspects of the NEMS design must be addressed in order to optimize the performance of the device. Design parameters available for a NEMS-based switch include beam length, thickness, and width, as well as actuation contact gap and contact area. Some of these parameters can be chosen by the designer, others depend on the manufacturing technology and decrease with each new generation of processes. Using a predictive model in MEMS+, the minimum program voltage can be calculated for optimized designs at different technology nodes. Lower electrode voltage and capacitance will reduce program energy. The mechanical program delay will decrease with scaling since the contact gap requires smaller beam displacement, and the reduced beam mass leads to faster electrostatic actuation. With each new node in CMOS technology, the minimum feature size is reduced, helping to reduce gaps. Therefore, the density, switching energy and switching delay of BEOL NEMS switches are expected to improve with technology scaling. [4, 5].


Several research groups have proposed different designs of miniaturized electromechanical devices that can be used in logic and memory applications. These designs include meander-shaped pendant lights [6]different configurations for side or vertical electrodes [7, 8] and resonator-based programmable logic gates [9]. Many semiconductor engineers remember Feynman’s famous lecture where he suggested we explore the “bottom room” [10] physical manipulation by reducing transistor architectures to nanometric dimensions. Today, this is happening with current FEOL semiconductor processing. We must not forget that there are also huge opportunities to explore the “piece at the top” at the BEOL part of semiconductor devices. For some specialized low-power applications, NEMS-based devices could be very useful when developing logic and memory, due to their power efficiency and ability to operate in adverse environments. NEMS-based architectures could take us back to the early days of electromechanical computing, but do so by using silicon-based devices in low-power computing applications.

References and further reading


[2] U. Sikder et al., 3D Integrated CMOS-NEM Systems: Enabling Next-Generation Computing Technology, 2021 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)

[3] U. Sikder et al., Towards a monolithically integrated hybrid CMOS-NEM circuit, IEEE Transactions on Electron Devices, VOL. 68, NO. December 12, 2021

[4] TK Liu, J. Jeon, R. Nathanael, H. Kam, V. Pott, and E. Alon, “Prospects for MEM logic switch technology,” in IEDM Tech. Dig., December 2010, p. 18.3.1–18.3.4.

[5] T.-JK Liu, U. Sikder, K. Kato and V. Stojanovic, “There is plenty of room at the top”, in Proc. IEEE 30th Int. Conf. Micro Electro Mech. System (MEMS), January 2017, p. 1 to 4

[6] Sumit Saha et al., Impact of thermal effects on the performance of power trigger circuits using NEMS, FinFET and NWFET, IEEE Transactions on Electron Devices, VOL. 68, NO. June 6, 2021

[7] Lars Prospero Tatum, Urmita Sikder, Tsu-Jae King Liu, Co-Optimization of Design Technology for End-of-Line Nonvolatile NEM Switch Arrays, IEEE Transactions on Electron Devices, VOL. 68, NO. April 4, 2021

[8] Li, R., Azhigulov, D., Allehyani, A. & Fariborzi, H. (2020). DC-DC converters without inductor based on BEOL NEM relay. 2020 IEEE International Symposium on Circuits and Systems (ISCAS)

[9] Ahmed, S., Li, R., Zou, X., Al Hafiz, MA and Fariborzi, H. (2019). Modeling and simulation of a reprogrammable logic gate based on a MEMS resonator using partial electrodes. 2019 Symposium on Design, Test, Integration and Packaging of MEMS and MOEMS (DTIP)



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